1. Field of the Invention
This invention relates to the processing of semiconductor wafers. More particularly, this invention relates to an improvement in a method for forming a capacitor in a trench in a semiconductor wafer by implanting the trench with oxygen resulting in subsequent formation of a layer of oxide of more uniform thickness.
2. Description of the Related Art
In the formation of integrated circuit structures in semiconductor wafers, trenches or slots are often formed in the wafer, e.g., a silicon substrate, to form oxide portions therein to provide isolation between adjacent active devices. While the entire trench could be filled with oxide, to avoid the formation of voids in the trench, the walls of the trench, including the bottom, are usually oxidized and the remainder of the trench is then filled with another material, such as polysilicon.
When a polysilicon filler, or some or conductive material, is used to fill the trench, it is possible to form a capacitor from the trench materials, using the conductive filler such as polysilicon as one electrode, the silicon substrate as the other electrode, and the oxide on the walls of the trench as the dielectric. The dimensions of the trench, i.e., the area covered by oxide and the thickness of the oxide, control the amount of capacitance.
One problem which has been encountered, however, in the formation of such capacitors, is that the oxide layer formed in the trench is not uniform in thickness. It has been found that oxide forms on silicon at the fastest rate on the vertical sidewalls of the trench, i.e., the relatively flat walls, while oxide forms at the slowest rate on the concave bottom wall of the trench. Oxide is formed at an intermediate rate on the silicon surface at the convex curves at the top of the trench.
For example, when silicon oxide (SiO.sub.2) is grown at about 1000.degree. C., in a trench formed in a silicon semiconductor wafer, to a thickness of about 200 Angstroms on the sidewalls of the trench, the curved bottom surface of the trench, having a radius of curvature of about 0.5 microns, may have an oxide thickness of only about 100 Angstroms, and the trench surfaces at the convex corners at the top of the trench may have an oxide thickness of about 180 Angstroms.
The phenomenon of formation of oxide at non-uniform rates on the surfaces of trenches formed in silicon substrates is known and has been discussed in the literature. For example, Sinclair et al, in an article entitled "A High Resolution Electron Microscopy Study of the Fine Structure in a Trench Capacitor", published in Journal of the ElectroChemical Society, Vol. 136, No. 2, in February 1989 at pages 511-518, point out, on page 511, that thickness variations in the oxide layer occur at curved surfaces of trenches, e.g., at the top and bottom corners, and that the crystallographic dependence of silicon oxidation rate can introduce oxides of different thickness on the various crystallographic faces.
As a result of this, when a capacitor is formed using such an oxide layer as the dielectric, voltage breakdown of the capacitor most likely will occur in the region at the bottom of the trench where the formed oxide layer is the thinnest.
This presents a dilemma since the sidewalls of the trench represent the largest area and, therefore, the thickness of the oxide over this region will control the amount of capacitance which can be formed. If the overall oxide coating is made thick enough to withstand voltage breakdown in the thinnest region, i.e., the bottom of the trench, the oxide coating may be too thick on the sidewalls for the desired capacitor formation.
As trenches with higher aspect ratios become more common, i.e., narrower and deeper trenches with aspect ratios greater than 10:1, this problem is exacerbated. This is because the narrower the trench, the sharper the curvature at the bottom of the trench becomes, resulting in even poorer oxide growth on the surfaces at the bottom of the trench.
Therefore, it would be desirable to be able to form an oxide coating of more uniform thickness on the surfaces of a trench of a semiconductor wafer, particularly a trench with a high aspect ratio, to avoid the problem of voltage breakdown in thin regions of the dielectric oxide layer without making the dielectric oxide too thick for useful capacitor formation.